Due to their attractive properties and simplicity, chaotic systems have garnered a lot of attention recently as a source of randomness and unpredictability. In many areas of computer applications, including information security, simulation, gaming etc., their inherent properties, such as sensitivity to the initial conditions, random-like behavior, and unpredictability, are highly desired. The usefulness of such systems as a source of randomness, however, is diminished by the fact that the digital implementation of such systems directly affects their dynamical behavior. This work aims to propose a simple and effective circuit for minimizing the effects of the digitization process on the behavior of chaotic systems and to achieve a strong and secure chaos-based PRNG. The proposed circuit has two main parts. The first is meant to make the digitized chaotic map even more random, and the second is meant to make the cycle-length longer. The proposed circuit has been performed on the logistic chaotic map. The improved map underwent several evaluations using a set of mathematical and statistical tools to affirm the improvement made to it. The simulation results have shown that the improved chaotic map provides better randomness and statistical properties. On the other hand, the designed improved map was synthesized on the Xilinx ZYNQ 7000 Field Programmable Gate Array (FPGA) where it provided better performance with low implementation cost compared with other proposals.