Romanian Journal of Information Technology and Automatic Control / Vol. 17, No. 4, 2007

REALIZAREA UNEI MEMORII ADRESABILE DUPĂ CONȚINUT

Jacob Petrescu, Costică Nițu

Abstract:

The paper presents an implementation of a content addressable memory (CAM) based on reconfigurable structures FPGA and, also, as an ASIC. Details of the main CAM structural components, including associated logic, their Verilog description, VLSI masks and simulation results are provided.

Keywords:
associative memories, content addressable memories, associative arrays, caomparand, repondent, FPGA, ASIC, Verilog.

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CITE THIS PAPER AS:
Jacob Petrescu, Costică Nițu, "REALIZAREA UNEI MEMORII ADRESABILE DUPĂ CONȚINUT", Romanian Journal of Information Technology and Automatic Control, ISSN 1220-1758, vol. 17(4), pp. 71-80, 2007.